Mesh Circuit Analysis

Background: This page provides a visual representation of mesh analysis applied to simple circuits.

Sample Circuits:
Circuit Components: Wire Resistor Voltage Source
Circuit Tools: Probe Examine Eraser  
Drawing Properties:   Loop Coloring:   Electrons: Small Large

Not Supported

Introduction: This application demonstrates the analysis of signals using mesh circuit analysis. The application provides a design interface for constructing a circuit, and an algorithm to identify and color-code loops; apply mesh circuit analysis to the circuit; and show current flows.

Directions: A circuit can be designed on the grid below using the following tools:

More Info:

Circuits that involve only resistors and constant voltage sources can be algorithmically evaluated using mesh current analysis to determine how current will flow through the circuit. This technique involves identifying loops within the circuit; constructing a resistance matrix that relates the set of resistors to the input voltage of each loop; and solving the matrix to determine the current of each loop.

Mesh circuit analysis is performed whenever the circuit is altered. The results are displayed as a flow of electrons. Current magnitude is depicted as the speed of electrons through the circuit. The speed is normalized to the maximum current in the circuit. The idealized resistance of a short circuit is zero, which of course raises calculation issues. To avoid miscalculation, every plain wire segment has a resistance of 10-5 Ω. In the absence of an actual short circuit, these effects will typically vanish due to rounding.

The most difficult part of this project was simply identifying the loops that are present in the matrix, given an arbitrary set of segments. The following process was devised for this task:

  1. The circuit is represented as a three-dimensional array of grid segments, represented by x-coordinate, y-coordinate, and orientation (0 = horizontal, 1 = vertical). Each element of the array stores the component type, orientation (important for voltage sources), and value (resistance or voltage supplied). This matrix is also constructed with an extra, invisible segment beyond the boundary: i.e., the (n x n circuit shown is modeled as n+2 x n+2 circuit elements, with the edges not drawn or selectable). This model permits the outermost segments to remain empty, and extensively reduces bounds-checking during the following steps.

  2. This array is evaluated to determine the enclosed grid spaces, or "plots," that comprise each loop. This is achieved by selecting an unassigned starting plot, and then expanding outward to all adjacent plots that aren't separated by a component. This process continues until all plots have been assigned to a loop. (The plots comprising each loop are color-coded in the display.) As above, the visible grid is bounded by an extra ring of invisible plots that remain empty, and that define loop 0 - i.e., all plots that are associated with the background.

  3. For each loop, the segments adjacent to each plot and containing a component (including a length of wire) are identified and stored in an array. Segments are discarded that are not adjacent to one (and only one!) plot of the loop. (Segments that are adjacent to none are external to the loop; segments that are adjacent to two are internal to the loop.)

  4. For each loop, the remaining segments are traced in a clockwise order, in order to determine the direction of current through the segment for the loop (e.g., whether current in a horizontal segment flows left-to-right or right-to-left, based on its position in the loop). First, the top-left-most horizontal segment is identified, which, logically, must exhibit a left-to-right flow. Adjacent segments are identified, along with the direction of each segment, until the starting segment is reached again. Segments that are not part of this trace are pruned from the array of segments for the loop. The remaining segments are indexed according to their loops for quick lookup.
Once the circuit is modeled as described above, the actual mesh circuit analysis is comparatively easy. Once all of the elements of each loop are identified, the resistance matrix is readily constructed and solved via row reduction. The determinant calculation involves expansion of minors - which is not even remotely optimized or performant (hence the limited scalability to larger circuits), but could be easily replaced. The matrix solution indicates the current of each loop, and the current of each segment is simply the sum of the currents of the loops in which the segment participates.

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(C) 2015, David Stein. All rights reserved.